Cadence Design Systems Inc. is seeking a motivated Software Engineer I: VIP to join our Verification IP team in the memory modeling group, located in Belo Horizonte, Brazil.
Job Description
Testing, validating, and deploying enhancements on cutting edge hardware device models for key customer.
Working with Research and Development (R&D) to develop, implement, and test features for the next generation of Verification IP tools.
Troubleshoot and resolve complex technical issues related to memory verification, including simulation failures, coverage gaps and performance bottlenecks.
Provide clear and concise explanations of technical concepts and solutions to customers with varying levels of expertise.
Support customer project needs including reproducing and fixing their issues in-house to facilitate debugging and resolution.
Establish a close working relationship with customers, peers and management.