+ Design of optimized digital blocks meeting functional, cost and low power constraints and ensure spec compliance. + Develop TCL scripts and design constraints to perform synthesis, DFT insertion and static timing analysis. + Support DFT strategy and implementation. + Verification planning, feature extraction and verification test case development. + Interface with P & R for digital hand-off and post layout verification. + Develop test vectors for production test. + Perform physical silicon device evaluation where necessary. + Produce high quality documentation for own blocks. + Develop work-around solutions where necessary to overcome device errata including documentation. + All other tasks as deemed reasonable by your manager some of which will be set during annual performance review.