Transform next-gen computing with AMD as an RTL Design Engineer focusing on SerDes Technology. Drive high-performance design in a hybrid work environment through collaboration and innovative solutions.
As a key member of AMD's SerDes Technology team, you will lead RTL design of multi-protocol wireline transceivers. This position prioritizes the development of digital components like calibration loops and signal processing logic. Your expertise will significantly contribute to micro-architecture planning and PPA optimization while working closely with system architects and other technical teams.
Key Responsibilities: • Define micro-architecture for high-speed SerDes PHY • Own RTL design for logic blocks including DSP and CDR • Apply low-power techniques and perform PPA analysis • Develop test benches to validate design functionality • Run design checks to ensure quality and compliance