As a member of the Mixed‑Signal Development Group, the candidate will be engaged in the support and debugging of PLLs, high‑speed SERDES, ADCs, DACs, and other analog building blocks.

Responsibilities

• Define the requirements for Mixed‑Signal IPs in discussion with the SoC architects
• Collaborate with IP vendors to customize IP solutions and finalize Statement of Work (SOW)
• Manage IP intake processes, including pre‑licensing and post‑acquisition QA, integration, and sign‑off reviews
• Support Mixed‑Signal IP through post‑tape‑out phase, including lab testing, customer bring‑up and debug
• Active involvement in lab testing, support and debug of mixed‑signal and SERDES blocks
• Ownership of circuit and system specifications
• Design CMOS analog and mixed‑signal integrated circuits

Requirements / Qualifications

• Bachelor’s degree in electrical engineering or related field with strong analog/m...