Job Description

As a High Level Synthesis Compiler Engineer at Altera, you will focus on our compiler and the software that turns RTL and constraints into realizable designs: lowering, optimization, and integration with the broader implementation, timing, and debug flow.

You will build reliable and scalable tools; mentor talented engineers; and stay close to customers so their hardest design goals stay technically possible and practical in our tools.

Responsibilities

• Develop and optimize our compiler for the FPGA design flow: IR and lowering, analysis and transformation passes, correctness- and QoR-driven optimizations, and scalability (runtime and memory) on large designs.
• Work closely with customers to enable what they want to do: understand target applications, workflows, and success criteria; advocate for the capabilities, quality-of-results, and turnaround time they need; and turn that into concrete compiler and flow improvements...