TSMC Design Technology Canada seeks an Expert Memory Layout Engineer in Ottawa to lead advanced semiconductor design projects. Collaborate on innovative memory compiler layouts and solutions.

As a Senior Memory Layout Engineer, you will handle custom layout designs in deep-submicron processes, focusing on both memory arrays and high-speed analog circuits. This role demands expertise in layout coordination, providing high-quality results to facilitate ongoing R&D initiatives.

Key Responsibilities:
• Execute custom layouts for varying memory designs
• Coordinate layout work with detailed planning strategies
• Apply CAD tools for design and layout verification
• Manage compliance with ESD and latch-up requirements
• Collaborate effectively with international teams on projects

Requirements:
• Bachelor’s or master’s degree in relevant engineering fields
• Minimum of 8 years in Semiconductor Memory Layout
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