Applications are invited for an undergraduate student in High Performance Computing (HPC) architectures at the Barcelona Supercomputing Center (BSC). BSC intends to pave the way to the future low-power European processor for Exascale in the context of multiple architecture initiatives (EPI, Lenovo, Intel, etc.).
Key Duties
Define a low-power System-on-Chip architecture targeting Exascale.
Benchmark RISC-V-based HPC processors with relevant applications from the HPC domain as well as emerging applications such as precision medicine.
Synthesize and optimize the design for an FPGA target